1. Field of the Invention
The present invention relates to a test jig for a high frequency semiconductor package, and more particularly to a test jig suitable for testing the electrical characteristics of a high frequency semiconductor package.
2. Background Art
When the electrical characteristics of a high frequency semiconductor package are to be tested, a wiring of a test circuit substrate is connected between the test equipment (including a computer) and the semiconductor package to allow exchange of high frequency signals therebetween. At that time, electrodes of the high frequency semiconductor package must be electrically connected to the wiring on the test circuit substrate. Conventionally, this is accomplished by means of a known test jig that employs a contactor (see, e.g., Patent Document 1).
[Patent Document 1] Japanese Laid-Open Patent Publication No. 2004-251720
Specifically, this test jig includes a test circuit substrate and a contactor. The test circuit substrate has a microstrip line structure and includes an insulating substrate having a wiring and a ground conductor on its top and bottom surfaces, respectively. The characteristic impedance of the wiring of the test circuit substrate is set to a predetermined value (e.g., 50 Ω). On the other hand, the contactor includes contact pins and a grounding block disposed to face the contact pins. The contact pins are connected to the wiring, etc. of the test circuit substrate. The grounding block is connected to the ground conductor of the test circuit substrate through a via formed in the insulating substrate.
When the electrical characteristics of a high frequency semiconductor package are tested using this conventional test jig, high frequency signals are exchanged between the wiring of the test circuit substrate and an electrode(s) of the high frequency semiconductor package through a contact pin(s) of the contactor. As described above, the characteristic impedance of the wiring of the test circuit substrate is set to a predetermined value. On the other hand, the distance between the contact pin(s) and the grounding block is determined primarily by the size, structure, etc. of the high frequency semiconductor package, meaning that the characteristic impedance of the contact pin(s) may not be able to be matched to that of the wiring of the test circuit substrate. In such a case, the high frequency signals are attenuated or degraded when they pass through the contact pin(s), resulting in the inability to accurately test the electrical characteristics of the high frequency semiconductor package.